Design of Metal-Oxide-Metal Capacitors in a 65-nm CMOS Process

Volume: 30, Issue: 10, Pages: 846 - 849
Published: Oct 1, 2019
Abstract
Three types of metal–oxide–metal capacitors fabricated in a 65-nm CMOS process are compared. The HPP structure utilizing only the vertical electric field exhibits a higher capacitance density of 0.2, 0.64, and 0.76 fF/μm2 as the number of stacked metal layers increase to four, six, and eight, respectively. The VPP structure, which utilizes only the horizontal electric field, exhibits a relatively small capacitance density of 0.27 fF/μm2. In...
Paper Details
Title
Design of Metal-Oxide-Metal Capacitors in a 65-nm CMOS Process
Published Date
Oct 1, 2019
Volume
30
Issue
10
Pages
846 - 849
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