Original paper
Back-End-of-Line Compatible Transistors for Monolithic 3-D Integration
Abstract
The manufacturers of high-performance logic have been ardent champions of Moore's Law, which has resulted in exponential increase in aerial transistor density to 100 million transistors per square millimeter of silicon real estate. However, it is the memory chip makers who have taken the first step toward escaping the confines of scaling within the horizontal plane and have embraced the vertical or the third dimension. The dynamic random access...
Paper Details
Title
Back-End-of-Line Compatible Transistors for Monolithic 3-D Integration
Published Date
Nov 1, 2019
Journal
Volume
39
Issue
6
Pages
8 - 15
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Notes
History