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The demands of future applications in computing (from self-driving cars to bioinformatics) overwhelm the projected capabilities of current electronic systems. The need to process unprecedented amounts of loosely structured data is driving the push for ultradense and fine-grained integration of traditionally off-chip components (e.g., sensors, memories) with energy-efficient computation units—all within a single chip. Monolithic 3-D integration is a leading approach for building such future syste...
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This special issue provides an overview of the foundational advances enabling 3-D monolithic systems, reports on exciting new advances, and identifies open opportunities and challenges.
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Computing-in-memory (CiM) is a popular design alternative to overcome the von Neumann bottleneck and improve the performance of artificial intelligence computing applications. Monolithic three-dimensional (M3D) technology is a promising solution to extend Moore's law through the development of CiM for data-intensive applications. In this article, we first discuss the motivation and challenges associated with two-dimensional CiM designs, and then examine the possibilities presented by emerging M3...
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The manufacturers of high-performance logic have been ardent champions of Moore's Law, which has resulted in exponential increase in aerial transistor density to 100 million transistors per square millimeter of silicon real estate. However, it is the memory chip makers who have taken the first step toward escaping the confines of scaling within the horizontal plane and have embraced the vertical or the third dimension. The dynamic random access memory manufacturers have adopted stacked capacitor...
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Resistive RAM (RRAM) has been presented as a promising memory technology toward deep neural network (DNN) hardware design, with nonvolatility, high density, high ON/OFF ratio, and compatibility with logic process. However, prior RRAM works for DNNs have shown limitations on parallelism for in-memory computing, array efficiency with large peripheral circuits, multilevel analog operation, and demonstration of monolithic integration. In this article, we propose circuit-/device-level optimizations t...
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#1Shane Greenstein (Harvard University)H-Index: 33
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#1Jonghyun Bae (SNU: Seoul National University)H-Index: 1
#2Hakbeom Jang (SKKU: Sungkyunkwan University)H-Index: 4
Last.Jae W. Lee (SNU: Seoul National University)H-Index: 16
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This article presents SSDStreamer, an SSD-based caching system for large-scale machine learning. By using DRAM as stream buffer, instead of an upper-level cache, SSDStreamer significantly outperforms state-of-the-art multilevel caching systems on Apache Spark, while requiring much less DRAM capacity.
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This book discusses the start and development of the California technology industry in Silicon Valley. The author sees the rapid ascent of Silicon Valley as arising from a fortunate mixture of two incompatible elements. For much of its history, that industry was led by people who distrusted authority in general and big government in particular. The rugged individual (cowboy) mentality of the west stood in sharp contrast to the values and behavior of the eastern establishment. On the other hand, ...
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