Compact Code-Based Signature for Reconfigurable Devices With Side Channel Resilience

In this paper, we present a compact design for the code based signature called LEDAsig with side channel resistance. Existing implementations concentrate on the high-speed feature while few of them have considerations on area or power efficiency which are particularly decisive for low-cost or power constrained IoT applications. We propose an area-efficient FPGA architecture for systematically rotating the QC-LDGM codes amongst the block RAMs...