AI hardware acceleration with analog memory: Microarchitectures for low energy at high speed

Volume: 63, Issue: 6, Pages: 8:1 - 8:14
Published: Nov 1, 2019
Abstract
In this article, we present innovative microarchitectural designs for multilayer deep neural networks (DNNs) implemented in crossbar arrays of analog memories. Data is transferred in a fully parallel manner between arrays without explicit analog-to-digital converters. Design ideas including source follower-based readout, array segmentation, and transmit-by-duration are adopted to improve the circuit efficiency. The execution energy and...
Paper Details
Title
AI hardware acceleration with analog memory: Microarchitectures for low energy at high speed
Published Date
Nov 1, 2019
Volume
63
Issue
6
Pages
8:1 - 8:14
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