A 24-bit sigma-delta ADC with configurable chopping scheme

This paper presents a low-power high-precision sigma-delta analog-to-digital converter (ADC) mainly used for DC measurement, especially in applications with high input impedance. A configurable chopping scheme is proposed to reduce the input-dependent residual offset caused by the clock feed-through. Furthermore, it also improves noise performance in the first integrator. The 1.17 mm2 chip is fabricated in a standard 65 nm CMOS process....