A Hardware-assisted Translation Cache for Dynamic Binary Translation in Embedded Systems
Published: Sep 1, 2018
Abstract
Approaches to Dynamic Binary Translation (DBT) on resource-constrained embedded systems are not straight forward, leading to several improvements and acceleration suggestions that rely on dedicated hardware. Software to hardware of-floading is a common acceleration procedure used when software-only approaches do not meet the performance requirements, making such approach suitable to be successfully applied to DBT. This article approaches...
Paper Details
Title
A Hardware-assisted Translation Cache for Dynamic Binary Translation in Embedded Systems
Published Date
Sep 1, 2018
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