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A Class-D Amplifier for a Digital Hearing Aid with 0.015% Total Harmonic Distortion Plus Noise

Volume: 35, Issue: 5, Pages: 819 - 826
Published: Oct 1, 2013
Abstract
A class-D audio amplifier for a digital hearing aid is described. The class-D amplifier operates with a pulsecode modulated (PCM) digital input and consists of an interpolation filter, a digital sigma-delta modulator (SDM), and an analog SDM, along with an H-bridge power switch. The noise of the power switch is suppressed by feeding it back to the input of the analog SDM. The interpolation filter removes the unwanted image tones of the PCM...
Paper Details
Title
A Class-D Amplifier for a Digital Hearing Aid with 0.015% Total Harmonic Distortion Plus Noise
Published Date
Oct 1, 2013
Volume
35
Issue
5
Pages
819 - 826
References15
It is shown that the use of a canonical signed digit (CSD) representation of the filter coefficients can significantly reduce the complexity of the hardware implementation of digital FIR filters. This paper presents an example filter design that shows the error involved in limiting the number of allowable non-zero CSD coefficients for a real FIR bandpass filter. If not done carefully, brute force limiting can lead to large errors in the frequency response. The error is evaluated for varying numb...
Original paper
# 1B. Forejt(TI: Texas Instruments (United States))
2
# 2Vijay Rentala(TI: Texas Instruments (United States))
8
Last. Gangadhar Burra(TI: Texas Instruments (United States))
8
A "battery connect" compatible class D (switching) amplifier which is fully integrated in a 90-nm digital CMOS process is presented. The integration of the amplifier requires no additional masks, processing, or cost. This paper includes a brief description of the circuit techniques that enable direct battery (2.7-5.4 V) connection and allow support >6.7 V/sub P2P/ (700 mW into 8 /spl Omega/) output swing from a 4.2-V supply using devices that operate solely with low gate voltages. The achieved S...
An interactive evolutionary computation (EC) fitting method is proposed that applies interactive EC to hearing aid fitting and the method is evaluated using a hearing aid simulator with human subjects. The advantages of the method are that it can optimize a hearing aid based on how a user hears and that it realizes whatever+whenever+wherever (W 3 ) fitting. Conventional fitting methods are based ...
The design of a fully integrated, filterless, class-D audio amplifier in standard 0.25- CMOS technology is described: a novel class-D amplifier architecture, where uniform pulsewidth modulation is introduced. The architecture attenuates residual clock signals around the loop allowing very low harmonic distortion, , to be achieved in conjunction with high PSRR, at 217 Hz. When driving 1.2 W into an 8- load, it achieves an SNR of 103 dB (A-weighted) with an efficiency of . The maximum output power...
Original paper
# 1Youngkil Choi(Hanyang University)
6
# 2Wonho Tak(Hanyang University)
1
Last. Jinseok Koh(Dongbu HiTek (South Korea))
7
A low-distortion third-order class-D amplifier that is fully integrated into a 0.18-μ m CMOS process was designed for direct battery hookup in a mobile application. A class-D amplifier for direct battery hookup must have a sufficiently high power supply rejection ratio (PSRR) in preparation for noise, such as when a global system for mobile communications (GSM) bursts ripples through the system power line. This amplifier has a high PSRR of 88 dB for 217-Hz power supply ripples, using a third-ord...
Original paper
# 1Kyoung-Sik Kang(Hanyang University)
2
# 2Jeongjin Roh(Hanyang University)
20
Last. Songjun Lee(Hanyang University)
8
We present the design of a single-chip delta-sigma (DeltaSigma) modulation-based class-D amplifier for driving headphones in portable audio applications. The presented class-D amplifier generates output pulse signals using a single-bit fourth-order high-performance DeltaSigma modulator. To achieve a high signal-to-noise ratio and ensure system stability for a large input range, the locations of the modulator loop filter poles and zeros are optimized and thoroughly simulated. The test chip is fab...
Original paper
# 1Minsheng Wang(Broadcom (United States))
20
# 2Xicheng Jiang(Broadcom (United States))
11
Last. Todd L. Brooks(Broadcom (United States))
5
High efficiency Class-D speaker drivers have become ubiquitous in battery driven mobile audio applications. Analog switching errors and timing jitter are known limitations to the dynamic range in these types of switching audio drivers. To overcome these limitations the Class-D architecture chosen in this paper provides a low 667 kHz pulse rate. This architecture is based on a 4th-order digital modulator with pulse-width modulation (PWM) feedback. The modulator loop processes the PWM signals at a...
Original paper
# 1Kyehyung Lee(OSU: Oregon State University)
8
# 2Qingdong Meng(TI: Texas Instruments (United States))
5
Last. Gábor C. Temes(OSU: Oregon State University)
43
A 0.8 V third-order multibit DeltaSigma DAC with headphone driver is described. It is the first sub-1 V audio DeltaSigma DAC with integrated on-chip headphone driver. The dual-channel operation in digital section was efficiently realized with a time-interleaved single-channel hardware and extra registers. Using novel DAC architecture suitable for low-voltage operation, the analog section requires only one opamp per channel for the D/A conversion, low-pass filtering, and driving the headphone. Tw...
Original paper
# 1P.P. Siniscalchi(TI: Texas Instruments (United States))
4
# 2R.K. Hester(TI: Texas Instruments (United States))
14
A class-D amplifier that employs a new modulation scheme and associated output stage to achieve true filter-less operation is presented. It uses a new type of BD modulation that keeps the output common-mode constant, thereby removing a major contributor to radiated emissions, typically an issue for class-D amplifiers. The amplifier meets the FCC class B standard for radiated emissions without any LC filtering. It can accomplish this without any degradation to audio performance and while retainin...
Original paper
# 1Sunyoung Kim(KAIST: Korea Advanced Institute of Science and Technology)
22
# 2Namjun Cho(KAIST: Korea Advanced Institute of Science and Technology)
26
Last. Hoi‐Jun Yoo(KAIST: Korea Advanced Institute of Science and Technology)
50
A 0.9 V 96 muW fully operational low-power digital hearing aid chip is proposed and implemented. An internal status controller is introduced to achieve full operation of the adaptive-SNR analog front end. Dedicated DSP with an additional volume control parameter eliminates any internal overflow and enables the hearing aid to be customized for each individual user. When the input audio band is split into a low band and a high band, the audio signal can be processed coarsely. In addition, fine pro...
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