Original paper
Background interstage gain calibration technique for pipelined ADCs
Volume: 52, Issue: 1, Pages: 32 - 43
Published: Jan 1, 2005
Abstract
A background self-calibration technique is proposed that can correct both linear and nonlinear errors in the interstage amplifiers of pipeline and algorithmic analog-to-digital converters (ADCs). Stage redundancy in a pipeline architecture is exploited to measure gain errors that are corrected using digital post-processing. The proposed technique allows faster convergence and has less dependence on input signal statistics than a similar...
Paper Details
Title
Background interstage gain calibration technique for pipelined ADCs
Published Date
Jan 1, 2005
Volume
52
Issue
1
Pages
32 - 43
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