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Dimitrios H. Tassis
Aristotle University of Thessaloniki
PhysicsTransistorElectronic engineeringCondensed matter physicsThin-film transistor
80Publications
17H-index
859Citations
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Publications 80
Newest
#1T.A. OproglidisH-Index: 2
#2Dimitrios H. TassisH-Index: 17
Last. C.A. DimitriadisH-Index: 6
view all 5 authors...
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#1T.A. Oproglidis (A.U.Th.: Aristotle University of Thessaloniki)H-Index: 2
#2Dimitrios H. Tassis (A.U.Th.: Aristotle University of Thessaloniki)H-Index: 17
Last. C.A. Dimitriadis (A.U.Th.: Aristotle University of Thessaloniki)H-Index: 6
view all 5 authors...
Abstract This paper investigates the local variability in nanoscale triple-gate junctionless FinFETs utilizing an analytical symmetric and continuous compact model combined with Monte Carlo simulations. Initially, the device parameters are extracted from the experimental transfer characteristics, such as threshold voltage, ideality factor, low-field mobility, source-drain series resistance, channel length modulation factor and mobility degradation factor. Then, statistical analysis is performed ...
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#1Y. Contoyiannis (UWest: University of the West)H-Index: 1
#1Yiannis Contoyiannis (UWest: University of the West)H-Index: 16
Last. Christoforos G. Theodorou (LAHC: Los Angeles Harbor College)H-Index: 10
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Abstract The drain current in nanoscale fully depleted ultra-thin body and buried oxide n-MOSFETs is studied in terms of critical dynamics. The time series formed by the measured current through the channel of the MOSFET, appears to have the form of random telegraph noise (RTN). This timeseries is analyzed by the Method of Critical Fluctuation (MCF). Its dynamics are compatible with critical intermittency. According to the quantitative analysis performed, the current-value distributions are comp...
2 CitationsSource
#1T.A. Oproglidis (A.U.Th.: Aristotle University of Thessaloniki)H-Index: 2
#2T.A. Karatsori (LAHC: Los Angeles Harbor College)H-Index: 8
Last. Charalabos A. Dimitriadis (A.U.Th.: Aristotle University of Thessaloniki)H-Index: 30
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The low-frequency noise in triple-gate junctionless n-MOSFETs, with channel lengths varying from 95 to 25 nm and operating in the bulk and accumulation modes, is investigated by measurements in the frequency and time domains. The experimental drain current noise spectra present 1/{f}and Lorentzian-type behavior components. The noise spectra in the time domain reveal that the Lorentzian-type behavior components are due to the capture and emission processes of carriers at discrete gate insulato...
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#1Dimitrios H. Tassis (A.U.Th.: Aristotle University of Thessaloniki)H-Index: 17
#2Stavros G. Stavrinides (AHLEI: American Hotel & Lodging Educational Institute)H-Index: 8
Last. Charalabos A. Dimitriadis (A.U.Th.: Aristotle University of Thessaloniki)H-Index: 30
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Low frequency noise in nanoscale fully depleted ultra-thin body and buried oxide n-MOSFETs is not as random (stochastic) as it appears to be. The fluctuation of the drain current in such nano-devices, under certain bias conditions, exhibits complex random telegraph noise (RTN) that is usually observed in chaotic systems. Indeed, the deterministic chaotic nature of this noise-like variation is confirmed by means of the combined calculation of established nonlinear dynamics metrics. Specifically, ...
4 CitationsSource
#1T.A. Oproglidis (A.U.Th.: Aristotle University of Thessaloniki)H-Index: 2
#2A. Tsormpatzoglou (A.U.Th.: Aristotle University of Thessaloniki)H-Index: 16
Last. Charalabos A. Dimitriadis (A.U.Th.: Aristotle University of Thessaloniki)H-Index: 30
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A new charge-based analytical compact model for the drain current of junctionless (JL) triple-gate MOSFETs is presented, which includes the short-channel effects, the saturation velocity overshoot, the series resistance, and the mobility degradation effects. The proposed model consists of a single analytical equation that covers the depletion operation region in which the bulk conduction determines the drain current. The model is supported by experimental measurements in JL nanowire transistors ...
16 CitationsSource
#1Konstantinos Zekentes (Institution of Engineers, Sri Lanka)H-Index: 17
#2Konstantin Vassilevski (Newcastle University)H-Index: 19
Last. Dimitrios H. TassisH-Index: 17
view all 13 authors...
Purely vertical 4H-SiC JFETs have been modeled by using three different approaches: the analytical model, the finite element model and the compact model. The results of the modeling have been compared with experimental results on a series of fabricated self-aligned devices with two different channel lengths (0.3 and 1.1μm) and various channel widths (1.5, 2, 2.5, 3, 4 and 5 μm). For all the considered models I-V and C-V characteristics could be satisfactorily simulated.
3 CitationsSource
Dec 1, 2014 in ICECS (International Conference on Electronics, Circuits, and Systems)
#1Dimitrios H. Tassis (A.U.Th.: Aristotle University of Thessaloniki)H-Index: 17
#2Ioannis Messaris (A.U.Th.: Aristotle University of Thessaloniki)H-Index: 5
Last. C.A. Dimitriadis (A.U.Th.: Aristotle University of Thessaloniki)H-Index: 6
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Our analytical compact drain current model for undoped or lightly doped nanoscale FinFETs has been successfully used to predict variability in the electrical characteristics of FinFETs. A simplified version of the model behaves almost as good as the analytical model but is more computational time efficient. Implementation of the models in verilog-A can be used to predict variability in circuits such as the inverter.
1 CitationsSource
#1Dimitrios H. Tassis (A.U.Th.: Aristotle University of Thessaloniki)H-Index: 17
#2Ioannis Messaris (A.U.Th.: Aristotle University of Thessaloniki)H-Index: 5
Last. Charalabos A. Dimitriadis (A.U.Th.: Aristotle University of Thessaloniki)H-Index: 30
view all 6 authors...
We expanded our analytical compact model for the drain current of undoped or lightly doped nanoscale FinFETs, in order to predict and decompose variability in the electrical characteristics of FinFETs. The model has been evaluated by comparison to TCAD simulated devices with predefined variability. Successful application to experimental data of FinFETs with fin width W fin = 15 nm, gate length L G =30 nm, equivalent gate oxide thickness t ox = 1.7 nm and fin height H fin = 65 nm, has attributed ...
3 CitationsSource
#1Dimitrios H. Tassis (A.U.Th.: Aristotle University of Thessaloniki)H-Index: 17
Polycrystalline silicon thin-film transistors (p-TFTs) can significantly be improved in terms of their performance with the bridged grain structure (BG TFTs) by forming lines with higher doping concentration (5×10 15 -10 16 cm -3 ) across the active channel, equally spaced at a distance close to the average grain size.
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